Waymo has revealed new technical details about the onboard computing system that powers its autonomous driving technology, including a purpose-built 5 nm ASIC delivering more than 1,000 TOPS of machine learning performance.
The company says its latest compute architecture is designed to provide millisecond-level response times while operating under the vibration, temperature extremes and other demanding conditions encountered by its autonomous vehicles.
Nvidia accelerated computing provides part of the foundation for the system, alongside technology from AMD, Micron, Samsung, Sandisk, Socionext and TSMC.
The disclosure provides a closer look at the computing infrastructure underpinning the Waymo Driver as the company expands its commercial robotaxi operations.
In a jointly bylined article on the Waymo website, Satish Jeyachandran, vice president of engineering at Waymo, and Daniel Rosenband, compute lead, say: “Compute is the brain of the Waymo Driver, translating raw sensor data into real-time driving commands.”
Unlike driver-assistance systems that ultimately rely on a human driver as a fallback, the Waymo Driver is responsible for the complete driving task. This places substantially greater demands on its onboard computing architecture, particularly in terms of latency, reliability and redundancy.
Waymo says it has designed the system around experience accumulated over more than 200 million miles of fully autonomous driving.
Waymo scales compute power 20-fold
One of the central requirements is responsiveness. All driving decisions are processed onboard the vehicle, with machine learning models continuously interpreting sensor information and determining how the vehicle should respond.
Waymo says it has scaled the raw computing power available to the Waymo Driver by 20 times over the past eight years.
The company says: “We have engineered our stack for ultra-low latency, minimizing the delay from first pixel to action.”
Within this processing window, machine learning models build a detailed representation of the vehicle’s surroundings and evaluate potential paths before issuing driving commands.
Waymo describes this measurement as “pixels-to-actuation” latency and says reducing it gives the autonomous driving system the fast responses required for complex, high-density environments.
Custom 5 nm ASIC delivers more than 1,000 TOPS
Waymo has also disclosed details of a purpose-built 5 nm ASIC designed to process the large quantities of raw information generated by the vehicle’s lidar, radar and camera systems.
The custom chip processes, combines and runs neural networks on sensor data in real time before that information reaches the system’s main machine learning processing architecture.
Waymo says: “The ASIC’s specialized accelerators instantly extract critical information from raw lidar, radar, and camera streams, including temporal denoising for superior low-light perception.”
The ASICs provide more than 1,000 TOPS of machine learning performance dedicated to front-end processing and machine learning models.
Waymo says co-designing its silicon alongside its sensors and algorithms enables it to optimize sensor fidelity, bandwidth efficiency and quantization while supporting models ranging from sparse convolutions to dense transformers.
Its latest system can simultaneously process high-fidelity information from 13 high-resolution cameras in real time, including data used to improve perception in low-light environments.
Nvidia provides accelerated computing foundation
Alongside its custom silicon, Waymo uses processors and accelerators from external technology suppliers to create what it describes as a “balanced, heterogeneous system”.
The architecture combines Waymo’s machine learning technology with CPUs, GPUs and other accelerators. These components handle both machine learning workloads and tasks such as orchestration, data movement and logging.
Waymo says: “We are proud to work alongside a number of partners like AMD, Micron, NVIDIA, Samsung, Sandisk, Socionext, and TSMC to deliver the most capable autonomous computing system.”
Nvidia accelerated computing provides a critical foundation for the architecture, supplying the performance and efficiency required to process demanding autonomous driving workloads in real-world conditions.
Redundant compute eliminates reliance on human fallback
Reliability is particularly important because Waymo’s fully autonomous vehicles cannot depend on a human driver taking control if the primary computing system encounters a problem.
Waymo has therefore designed its compute architecture around two independent processing systems.
The company says: “Our compute is designed like two independent engines. While they normally operate as one unit running full parallel workloads, if one experiences a fault, the other seamlessly takes over.”
The hardware has also been ruggedized for continuous operation under vibration, shock and extreme temperatures.
Waymo integrates the compute hardware directly with the vehicle’s liquid cooling system, allowing it to maintain performance in environments ranging from freezing Midwest winters to the extreme heat encountered in Phoenix.
Despite the processing requirements, Waymo says it has worked to minimize the system’s physical and energy footprint. The integrated architecture is designed to preserve trunk space, operate silently and reduce demands on the vehicle’s battery.
As Waymo expands the commercial deployment of its robotaxi services, onboard computing is increasingly becoming part of the infrastructure required to operate autonomous transportation at scale.
The company says the computational requirements are also likely to continue increasing as its AI models evolve and the Waymo Driver moves into additional applications.
Waymo says: “As we explore new use cases for the Waymo Driver and our AI stack continues to evolve, the demand for highly efficient, high-performance compute will only grow.”
