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Systems design: Teradyne standardizes simulation tasks using Cadence technology


Teradyne, the industrial giant which owns Universal Robots, has standardized its simulation tasks using technology from Cadence Design Systems.

Teradyne’s standardization uses Cadence’s Xcelium Parallel Logic Simulator, which is claimed will accelerate the development of application-specific integrated circuits.

Teradyne uses ASICs for delivery of its automation equipment for test and industrial applications. 

With the Xcelium simulator, Teradyne achieved a two-fold performance speed increase with production-use single-core, mixed-signal ASIC verification when compared with its previous simulation solution.

Teradyne, a longtime user of the broader Cadence Verification Suite, built a verification environment that can deliver first-pass silicon success with mixed-signal designs, accelerating time to market.



The Xcelium simulator has quickly become a key component in the verification environment, providing the Teradyne team with an easy-to-use solution that delivers fast simulation performance and ensures high-quality designs.

With Teradyne’s extensive use of real number models, the Xcelium simulator allows its designers to perform earlier, more complete full-chip mixed-signal verification.

In addition to using the Xcelium simulator, Teradyne is also utilizing the Cadence JasperGold Formal Verification Platform to assist with formal-first verification and expedited debug, and the Cadence vManager Metric-Driven Signoff Platform to effectively integrate the verification process from planning to metrics management across formal, simulation, emulation and verification IP.

Andre Hendarman, director of mixed signal ASIC development at Teradyne, says: “Rapid development and verification of our automation test equipment solutions is critical to our success.

“The Xcelium Parallel Logic Simulator has provided us with the fastest simulation performance by far, which is helping us speed up the delivery of our test products, while also ensuring our designs are of the highest quality.”

The new Xcelium simulator further extends the innovation within the Cadence Verification Suite and supports the company’s System Design Enablement strategy, which enables system and semiconductor companies to create complete, differentiated end products more efficiently.

The Verification Suite is comprised of best-in-class core engines, verification fabric technologies and solutions that increase design quality and throughput, fulfilling verification requirements for a wide variety of applications and vertical segments.